この評価ボードは電源が使い辛い。
ICE,TARGETともにUSB電源であるが、μプロセッサに入るのはD1,D2,D4のダイオードが入り4.67Vとなっている。
1) ICE接続時USBVBUS->D4->VCC5->D2->NUC120となる2) TARGETのみ接続では USBVUS->D1->NUC120
3) ICE,TARGET接続ではUSBVBUS->D4->VCC5->D2->NUC120<-D1<-USBVBUS
3.3V系のSDカードや、I2Cデバイスを接続するにはD1,D4を取り外して 3.3Vのレギュレターをいれるしかないか？
(モードカットできる場所をさがしたが、無理そう)
------------------------------------------
HOS-V4a-20110405の続き
UART0を割り込みで使用すべくソースをいじってみた。
UART0 は NVIC（割り込みコントローラ）ではベクタ番号が28で、割り込み番号が12と、2つの数値があります。
system.cfg で使うのはベクタ番号の28、割り込み許可等で使うのは12となる。
UART用にバッファをもうけるが、そのバッファ管理ようにEvent Flagを使う(FLGID_UART)
ostimer.cも修正 ena_int(); はいらないようだ。
また、USB接続時にリセット後の動作が安定しないので、main.c のDelay(1000->10000)にしてみた。
sample/arm/nuc120/uart.c
/**
* Sample program for Hyper Operating System V4 Advance
*
* @file uart.c
* @brief %jp{UARTへの出力}%en{UART device driver}
*
* Copyright (C) 1998-2011 by Project HOS
* http://sourceforge.jp/projects/hos/
*/
#include "kernel.h"
#include "kernel_id.h"
#include "nuc120_reg.h"
#define next(a,b) ((a + 1) & (b - 1)) /* b = 2^n */
#define UART_BUF_SIZE (64)
struct FIFO
{
volatile short push;
volatile short pull;
unsigned char array[UART_BUF_SIZE];
};
static struct FIFO uart_rx;
static struct FIFO uart_tx;
/* %jp{UARTの初期化} */
void
UART0_Initialize (VP_INT exinf)
{
uart_tx.push = uart_rx.push = 0;
uart_tx.pull = uart_rx.pull = 0;
/* CLK */
*REG_CLKDIV &= ~(15 << 8); /* UART_N = 0 */
*REG_CLKSEL1 &= ~(3 << 24); /* ExClk Source = ExClk 12MHz */
*REG_APBCLK |= (1 << 16); /* UART CLK Enable */
/* (GPB_MFP).BIT0,1=1 */
*REG_GPB_MFP |= 0x03;
/* UART */
*REG_U0ALTCON = 0x00;
*REG_U0FUNSEL = 0x00;
*REG_U0BAUD = (3 << 28) | (15 << 24) | ((12000000 / 115200) - 2);
*REG_U0LCR = 0x03; /* 8bit nonparity */
*REG_U0FCR = 0x06; /* FIFO reset & enable */
*REG_U0IER = 0x01; /* RDA_INT */
*REG_GPIOB_DOUT &= ~0x04; /* PB2 */
ena_int (12);
}
/* %jp{1文字出力} */
void
Uart_PutChar (int c)
{
FLGPTN flg;
if (next (uart_tx.push, UART_BUF_SIZE) == uart_tx.pull)
{
clr_flg (FLGID_UART, 0x0000);
*REG_U0IER |= 2; /* */
wai_flg (FLGID_UART, 0x0001, TWF_ORW, &flg);
*REG_GPIOB_DOUT ^= 0x04; /* PB2送信バッファ枯渇表示 */
}
*REG_U0IER &= ~2; /* */
// if (next (uart_tx.push, UART_BUF_SIZE) != uart_tx.pull) {
uart_tx.array[uart_tx.push] = (unsigned char) c;
uart_tx.push = next (uart_tx.push, UART_BUF_SIZE);
// }
*REG_U0IER |= 2; /* */
}
void
UART0_Isr (VP_INT exinf)
{
unsigned char c;
unsigned int status;
status = *REG_U0ISR;
while ((*REG_U0FSR & (1 << 14)) == 0) /* RX_EMPTY */
{
if (next (uart_rx.push, UART_BUF_SIZE) != uart_rx.pull)
{
uart_rx.array[uart_rx.push] = (unsigned char) *REG_U0RBR;
uart_rx.push = next (uart_rx.push, UART_BUF_SIZE);
}
else
{
c = (unsigned char) *REG_U0RBR;
} // 読み捨て
}
while ((*REG_U0FSR & (1 << 23)) == 0) /* TX_FULL */
{
if (uart_tx.pull != uart_tx.push)
{
*REG_U0THR = uart_tx.array[uart_tx.pull];
uart_tx.pull = next (uart_tx.pull, UART_BUF_SIZE);
}
else
{
*REG_U0IER &= ~2; /* */
break;
}
}
if (status & 2) /* THRE */
iset_flg (FLGID_UART, 0x0001);
}
/* end of file */
kernel/source/arch/proc/arm/arm_v6m/dis_int.c
// *(_KERNEL_REG_INT_CLRENA_BASE + (intno >> 2)) = (1 << (intno & 3));
*(_KERNEL_REG_INT_CLRENA_BASE) = (1 << (intno));
kernel/source/arch/proc/arm/arm_v6m/ena_int.c
// *(_KERNEL_REG_INT_SETENA_BASE + (intno >> 2)) = (1 << (intno & 3));
*(_KERNEL_REG_INT_SETENA_BASE) = (1 << (intno));
kernel/source/arch/proc/arm/arm_v6m/vclr_int.c
// *(_KERNEL_REG_INT_CLRPEND_BASE + (intno >> 2)) = (1 << (intno & 3));
*(_KERNEL_REG_INT_CLRPEND_BASE) = (1 << (intno));
sample/arm/nuc120/system.cfg
ATT_INI({TA_HLNG, 0, UART0_Initialize});
DEF_INH(28, {TA_HLNG, UART0_Isr}); /* 28:UART0 */
CRE_FLG(FLGID_UART, {TA_TFIFO | TA_WSGL, 0});
sample/arm/nuc120/ostimer.c
/**
* Sample program for Hyper Operating System V4 Advance
*
* @file ostimer.c
* @brief %jp{OSタイマ}%en{OS timer}
*
* Copyright (C) 1998-2006 by Project HOS
* http://sourceforge.jp/projects/hos/
*/
#include "kernel.h"
#include "ostimer.h"
#include "nuc120_reg.h"
volatile long OSTick;
#define REG_SCSR ((volatile UW *)0xE000E010) /* SysTick Control and Status Register */
#define REG_SRVR ((volatile UW *)0xE000E014) /* SysTick Reload Value Register */
#define REG_SCUVR ((volatile UW *)0xE000E018) /* SysTick Current Value Register */
#define REG_SCAVR ((volatile UW *)0xE000E01c) /* SysTick Calibration Value Register */
/** %jp{OS用タイマ初期化ルーチン} */
void OsTimer_Initialize(VP_INT exinf)
{
/* %jp{タイマ動作開始} */
*REG_SRVR = 12000;
*REG_SCUVR = 0;
*REG_SCSR = 0x00000003;
}
/** %jp{タイマ割込みハンドラ} */
void OsTimer_Isr(void)
{
/* %jp{割込み要因クリア} */
OSTick++;
if(OSTick & 0x40)
{
*REG_GPIOB_DOUT &= ~8;/* PB3 */
} else
{
*REG_GPIOB_DOUT |= 8;/* PB3 */
}
/* %jp{タイムティック供給} */
isig_tim();
}
/* end of file */
sample/arm/nuc120/nuc120_reg.h
#ifndef _NUC120_DEF_
#define _NUC120_DEF_
#define CLK_BA (0x50000200) /* System Clock Control Register */
#define REG_PWRCON ((volatile UW *)(CLK_BA+0x00)) /* PWRCON Register */
#define REG_AHBCLK ((volatile UW *)(CLK_BA+0x04)) /* AHBCLK Register */
#define REG_APBCLK ((volatile UW *)(CLK_BA+0x08)) /* APBCLK Register */
#define REG_CLKSEL0 ((volatile UW *)(CLK_BA+0x10)) /* CLKSEL0 Register */
#define REG_CLKSEL1 ((volatile UW *)(CLK_BA+0x14)) /* CLKSEL1 Register */
#define REG_CLKDIV ((volatile UW *)(CLK_BA+0x18)) /* CLKDIV Register */
#define REG_CLKSEL2 ((volatile UW *)(CLK_BA+0x1c)) /* CLKSEL2 Register */
#define REG_PLLCON ((volatile UW *)(CLK_BA+0x20)) /* PLLCON Register */
#define GCR_BA (0x50000000) /* System Manager Control Register */
#define REG_GPA_MFP ((volatile UW *)(GCR_BA+0x030)) /* GPIO Register */
#define REG_GPB_MFP ((volatile UW *)(GCR_BA+0x034)) /* GPIO Register */
#define REG_GPC_MFP ((volatile UW *)(GCR_BA+0x038)) /* GPIO Register */
#define REG_GPD_MFP ((volatile UW *)(GCR_BA+0x03c)) /* GPIO Register */
#define REG_GPE_MFP ((volatile UW *)(GCR_BA+0x040)) /* GPIO Register */
#define REG_WRPROT ((volatile UW *)(GCR_BA+0x100)) /* REGWRPROT Register */
#define GP_BA (0x50004000) /* System Manager Control Register */
#define REG_GPIOB_PMD ((volatile UW *)(GP_BA+0x040)) /* GPIOB Register */
#define REG_GPIOB_DOUT ((volatile UW *)(GP_BA+0x048)) /* GPIOB Register */
#define REG_GPIOC_PMD ((volatile UW *)(GP_BA+0x080)) /* GPIOB Register */
#define REG_GPIOC_DOUT ((volatile UW *)(GP_BA+0x088)) /* GPIOB Register */
#define ADC_BA (0x400e0000) /* ADC Registers */
#define REG_ADC_ADDR0 ((volatile UW *)(ADC_BA+0x000)) /* ADC0 Register */
#define REG_ADC_ADDR1 ((volatile UW *)(ADC_BA+0x004)) /* ADC1 Register */
#define REG_ADC_ADDR2 ((volatile UW *)(ADC_BA+0x008)) /* ADC2 Register */
#define REG_ADC_ADDR3 ((volatile UW *)(ADC_BA+0x00c)) /* ADC3 Register */
#define REG_ADC_ADDR4 ((volatile UW *)(ADC_BA+0x010)) /* ADC4 Register */
#define REG_ADC_ADDR5 ((volatile UW *)(ADC_BA+0x014)) /* ADC5 Register */
#define REG_ADC_ADDR6 ((volatile UW *)(ADC_BA+0x018)) /* ADC6 Register */
#define REG_ADC_ADDR7 ((volatile UW *)(ADC_BA+0x01c)) /* ADC7 Register */
#define REG_ADC_ADCR ((volatile UW *)(ADC_BA+0x020)) /* ADCR Register */
#define REG_ADC_ADCHER ((volatile UW *)(ADC_BA+0x024)) /* ADCHER Register */
#define REG_ADC_ADSR ((volatile UW *)(ADC_BA+0x030)) /* ADSR Register */
#define UART0_BA (0x40050000) /* UART0 */
#define REG_U0RBR ((volatile UW *)(UART0_BA+0x00)) /* UART Receiver Buffer Register */
#define REG_U0THR ((volatile UW *)(UART0_BA+0x00)) /* UART Transmitter Holding Register */
#define REG_U0BAUD ((volatile UW *)(UART0_BA+0x24)) /* UART Divisor Latch LSB and MSB Registers */
#define REG_U0IER ((volatile UW *)(UART0_BA+0x04)) /* UART Interrupt Enable Register */
#define REG_U0ISR ((volatile UW *)(UART0_BA+0x1c)) /* UART Interrupt Identification Register */
#define REG_U0FCR ((volatile UW *)(UART0_BA+0x08)) /* UART FIFO Control Register */
#define REG_U0LCR ((volatile UW *)(UART0_BA+0x0c)) /* UART Line Control Register */
#define REG_U0MCR ((volatile UW *)(UART0_BA+0x10)) /* UART0 Modem Control Register */
#define REG_U0FSR ((volatile UW *)(UART0_BA+0x18)) /* UART FSR Register */
#define REG_U0ALTCON ((volatile UW *)(UART0_BA+0x2c)) /* UART */
#define REG_U0FUNSEL ((volatile UW *)(UART0_BA+0x30)) /* UART */
#endif
/* end of file */
sample/arm/nuc120/main.c
/**
* Sample program for Hyper Operating System V4 Advance
*
* @file main.c
* @brief %jp{メイン関数}%en{main}
*
* Copyright (C) 1998-2006 by Project HOS
* http://sourceforge.jp/projects/hos/
*/
#include "kernel.h"
#include "nuc120_reg.h"
static void UNLOCK(){
*REG_WRPROT=0x59;
*REG_WRPROT=0x16;
*REG_WRPROT=0x88;
}
static void ENLOCK(){
*REG_WRPROT=0x00;
}
static void
Delay (unsigned int delayCnt)
{
while (delayCnt--)
{
asm ("nop");
asm ("nop");
}
}
/** %jp{メイン関数} */
int main()
{
/* %jp{ハードウェアの初期化} */
UNLOCK ();
*REG_PWRCON |= 1;/* ExClk 12MHz */
*REG_PLLCON = 0;
Delay (10000);
*REG_CLKSEL0 = 2;
Delay (100);
*REG_PLLCON = 0xc22e;/* 48MHz */
ENLOCK();
/* LEDをつけてみる */
*REG_GPA_MFP = 0x00;
*REG_GPB_MFP = 0x00;
*REG_GPC_MFP = 0x00;
*REG_GPD_MFP = 0x00;
*REG_GPE_MFP = 0x00;
*REG_GPIOC_PMD = 0x55;/* PC3..0 */
*REG_GPIOB_PMD = 0x50;/* PB3..2 */
*REG_GPIOB_DOUT = 0x08;/* PB3 */
/* %jp{カーネルの動作開始} */
vsta_knl();
return 0;
}
/* dummy */
void _sbrk(void)
{
}
/* end of file */
